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(R)
EMIF02-MIC02F1
IPAD.TM
2 LINES EMI FILTER AND ESD PROTECTION
MAIN PRODUCT CHARACTERISTICS: Where EMI filtering in ESD sensitive equipment is required : Mobile phones and communication systems s Computers, printers and MCU Boards s DESCRIPTION The EMIF02-MIC02 is a highly integrated devices designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF02 flip chip packaging means the package size is equal to the die size.
This filter includes an ESD protection circuitry which prevents the device from destruction when subjected to ESD surges up 15kV.
BENEFITS EMI symmetrical (I/O) low-pass filter s High efficiency in EMI filtering s s Very low PCB space consuming: 1.07mm x 1.57mm s Very thin package: 0.65 mm s High efficiency in ESD suppression s High reliability offered by monolithic integration s High reducing of parasitic elements through integration & wafer level packaging. COMPLIES WITH THE FOLLOWING STANDARDS:
Flip Chip package
PIN CONFIGURATION
3
I2 O2
2
GND GND
1
I1 O1
A B
IEC61000-4-2
Level 4 Level 1 on input pins on output pins 15kV 8 kV 2kV 2kV (air discharge) (contact discharge) (air discharge) (contact discharge)
MIL STD 883E - Method 3015-6 Class 3
BASIC CELL CONFIGURATION
Low-pass Filter Input Output Ri/o = 470 Cline = 16pF GND
TM : IPAD is a trademark of STMicroelectronics.
GND
GND
September 2002 - Ed: 1A
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EMIF02-MIC02F1
ABSOLUTE RATINGS (limiting values) Symbol Tj Top Tstg Parameter and test conditions Maximum junction temperature Operating temperature range Storage temperature range Value 125 -40 to + 85 125 Unit C C C
ELECTRICAL CHARACTERISTICS (Tamb = 25 C) Symbol VBR IRM VRM VCL Rd IPP RI/O Cline Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Series resistance between Input & Output Input capacitance per line
IPP VCL VBR VRM IR IRM IRM IR VRM VBR VCL I IPP
V
Symbol VBR IRM RI/O Cline @ 0V IR = 1 mA VRM = 12V per line
Test conditions
Min. 14
Typ. 16
Max.
Unit V
500 423 470 16 517
A pF
Fig. 1: S21(dB) attenuation measurement and Aplac simulation.
- 10.00 dB - 15.00 - 20.00 - 25.00 - 30.00 - 35.00
Measurement
Fig. 2: Analog crosstalk measurements.
-20.00 dB -30.00
-40.00
I2/O1
-50.00
-60.00
- 40.00 - 45.00
Simulation
-70.00
- 50.00 1.0M
3.0M
10.0M
30.0M
100.0M 300.0M f/Hz
1.0G
3.0G
-80.00 1.0M
3.0M
10.0M
30.0M
100.0M f/Hz
300.0M
1.0G
3.0G
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EMIF02-MIC02F1
Fig. 3: Digital crosstalk measurement Fig. 4: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout).
Fig. 5: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout).
Fig. 6: Line capacitance versus applied voltage.
C(pF) 20 18 16 14 12 10 8 6 4 2 0 0 1 2 3 4 5 6 7 8 9 10 11 12 VR(V)
F=1MHz Vosc=30mVRMS Tj=25C
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EMIF02-MIC02F1
Fig. 7: Aplac model
I1 R_470R O1
gnd
Cox
MODEL = D01-int MODEL = D01-ext
Cox
50pH
50pH
Rsubump
Rsubump MODEL = D01-gnd gnd
50m
50m
Rsubump MODEL = D01-ext Cox MODEL = D01-int
Rsubump
Lgnd Cgnd Cgnd Rgnd
O2
Lgnd
Cox
Rgnd
I2 R_470R
EMIF02-MIC02F1 model
Ground return
Fig. 8: Aplac parameters
Model D01-ext BV = 7 CJO = Cz_ext IBV = 1u IKF = 1000 IS = 10f ISR = 100p N=1 M = 0.3333 RS = Rs_ext VJ = 0.6 TT = 50n
Model D01-int BV = 7 CJO = Cz_int IBV = 1u IKF = 1000 IS = 10f ISR = 100p N=1 M = 0.3333 RS = Rs_int VJ = 0.6 TT = 50n
Model D01-gnd BV = 7 CJO = Cz_gnd IBV = 1u IKF = 1000 IS = 10f ISR = 100p N=1 M = 0.3333 RS = Rs_gnd VJ = 0.6 TT = 50n
aplacvar Ls 400pH aplacvar Rs 100m aplacvar R_470R 482.6 aplacvar Cz_ext 8.73pF aplacvar Rs_ext 850m aplacvar Cz_int 2.9pF aplacvar Rs_int 850m aplacvar Cz_gnd 215.61pF aplacvar Rs_gnd 470m aplacvar Rgnd 10m aplacvar Lgnd 48pH aplacvar Cgnd 0.15pF aplacvar Cox 3.05pF aplacvar Rsubump 200m
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EMIF02-MIC02F1
ORDER CODE
EMIF
Electro Magnetic Interference Filter Number of lines
02
-
MIC
02
F
1
Pitch = 500m Bump = 300m Flip Chip
Resistance value (Ohms) and Capacitance value / 10(pF) or Application (3 letters) and Version (2 digits)
PACKAGE MECHANICAL DATA FLIP CHIP
500 50 315 50 650 65
1.07 50
MARKING
365
1.57 50 All dimensions in m
240
365
(R)
220
XXX yww
All dimensions in m
40
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EMIF02-MIC02F1
PACKING
Dot identifying Pin A1 location* 4 +/- 0.1 1.5 +/- 0.1
1.75 +/- 0.1
3.5 +/- 0.1 8 +/- 0.3
xxx yww xxx yww xxx yww
ST
ST
ST
0.73 +/- 0.05 4 +/- 0.1 All dimensions in mm
User direction of unreeling
OTHER INFORMATION
Ordering code EMIF02-MIC02F1 Marking FJT Package Flip Chip Weight 2.3 mg Base qty 5000 Delivery mode Tape & reel (7")
Note: More packing informations are available in the application note AN1235: ''Flip-Chip: Package description and recommandations for use''
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 6/6

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